lp m 9 0 07 - 01 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 1 of 7 preliminary datasheet lpm 9 0 07 30v/4a p - channel enhancement mode field effect transistor general description the LPM9007 is the p - channel logic enhancement mode power field effect transistors are produced in using high cell density, dmos trench technology. this high density process is especially tailored to minimize on - state resistance. these devices are particularly suited for low voltage application s , notebook computer power management and other battery powered circuits where it is high - side switching. order information lpm 9007 f: pb - free package type b3: sot23 - 3 pin configurations features ? - 30v/ - 3 .0 a, rdc(on)=52m (typ.)@vgs= - 4 .5v ? - 30v/ - 3.0a,rdc(on)=80m (typ.)@vgs= - 2 .5v ? super high density cell design for extremely low rdc(on) ? sot23 package applications ? portable media players ? cellular and smart mobile phone ? lcd ? dsc sensor ? wireless card marking information device marking package shipping LPM9007 sot23 - 3 3k/reel
lp m 9 0 07 - 01 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 2 of 7 preliminary datasheet lpm 9 0 07 absolute maximum ratings parameter symbol maximum units drain - source voltage v ds - 30 v gate - source voltage v gs 12 v continuous drain current a t a =25 c i d - 4.2 a t a =70 c - 3.5 pulsed drain current b i dm - 30 power dissipation a t a =25 c p d 1.4 w junction and storage temperature range t j , t stg - 55 to 150 c thermal resistance ratings parameter symbol typ. max. units maximum junction - to - ambient r ja 125 c/w electrical characteristics symbol parameter condition min typ . max units static parameters bv dss drain - source breakdown voltage i d = - 250 a, v gs =0v - 30 v i dss zero gate voltage drain current v ds = - 24v, v gs =0v t j =55 c - 1 ua - 5 i gss gate - body leakage current v ds =0v, v gs = 12v 100 na v gs(th) gate threshold voltage v ds =v gs i d = - 250 a - 0.7 - 1 - 1.3 v i d(on) on state drain current v gs = - 4.5v, v ds = - 5v - 25 a r ds(on) static drain - source on - resistance v gs = - 10v, i d = - 4.2a ( t j =125 c ) 42 50 m 75 v gs = - 4.5v, i d = - 4a 53 65 m v gs = - 2.5v, i d = - 1a 80 120 m g fs forward transconductance vds= - 5v, id= - 5a 7 11 s v sd diode forward voltage is= - 1a,vgs=0v - 0.75 - 1 v
lp m 9 0 07 - 01 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 3 of 7 preliminary datasheet lpm 9 0 07 i s maximum body - diode continuous current - 2.2 a dynamic parameters c iss input capacitance v gs =0v, v ds = - 15v, f=1mhz 954 pf c oss output capacitance 115 pf c rss reverse transfer capacitance 77 pf r g gate resistance v gs =0v, v ds =0v, f=1mhz 6 switching parameters q g total gate charge v gs = - 4.5v, v ds = - 15v, i d = - 4a 9.4 nc q gs gate source charge 2 nc q gd gate drain charge 3 nc t d(on) turn - on delaytime v gs = - 10v, v ds = - 15v, r l =3.6 , r gen =6 6.3 n s t r turn - on rise time 3.2 t d(off) turn - off delaytime 38.2 t f turn - off fall time 12 t rr body diode reverse recovery time i f = - 4a, di/dt=100a/ s 20.2 ns q rr body diode reverse recovery charge i f = - 4a, di/dt=100a/ s 11.2 nc a: the value of r ja is measured with the device mounted on 1in 2 fr - 4 board with 2oz. copper, in a still air environment with t a =25 c. the value in any a given application depends on the user's specific board design. the current rating is based on the t 10s thermal resistance rating. b: repetitive rating, pulse width limited by junction temperature. c. the r ja is the sum o f the thermal impedence from junction to lead r jl and lead to ambient. d. the static characteristics in figures 1 to 6,12,14 are obtained using 80 s pulses, duty cycle 0.5% max. e. these tests are performed with the device mounted on 1 in 2 fr - 4 board with 2oz. copper, in a still air environment with t a=25 c. the soa curve provides a single pulse rating.
lp m 9 0 07 - 01 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 4 of 7 preliminary datasheet lpm 9 0 07 typical characteristics
lp m 9 0 07 - 01 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 5 of 7 preliminary datasheet lpm 9 0 07
lp m 9 0 07 - 01 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 6 of 7 preliminary datasheet lpm 9 0 07
lp m 9 0 07 - 01 may . - 20 13 email: marketing@lowpowersemi.com www.lowpowersemi.com page 7 of 7 preliminary datasheet lpm 9 0 07 packag e information
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